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EL8202, EL8203, EL8403
Data Sheet April 26, 2006 FN7106.2
500MHz Rail-to-Rail Amplifiers
The EL8202, EL8203, and EL8403 represent rail-to-rail amplifiers with a -3dB bandwidth of 500MHz and slew rate of 600V/s. Running off a very low supply current of 5.6mA per channel, the EL8202, EL8203, and EL8403 also feature inputs that go to 0.15V below the VS- rail. The EL8202 and EL8203 are dual channel amplifiers. The EL8403 is a quad channel amplifier. The EL8202 includes a fast-acting disable/power-down circuit. With a 25ns disable and a 200ns enable, the EL8202 is ideal for multiplexing applications. The EL8202, EL8203, and EL8403 are designed for a number of general purpose video, communication, instrumentation, and industrial applications. The EL8202 is available in a 10 Ld MSOP package, the EL8203 in 8 Ld SO and 8 Ld MSOP packages, and the EL8403 in 14 Ld SO and 16 Ld QSOP packages. All are specified for operation over the -40C to +85C temperature range.
Features
* 500MHz -3dB bandwidth * 600V/s slew rate * Low supply current = 5.6mA per channel * Supplies from 3V to 5.5V * Rail-to-rail output * Input to 0.15V below VS* Fast 25ns disable (EL8202 only) * Low cost * Pb-free plus anneal available (RoHS compliant)
Applications
* Video amplifiers * Portable/hand-held products * Communications devices
Ordering Information
PART NUMBER EL8202IY EL8202IY-T7 EL8202IY-T13 EL8202IYZ (See Note) EL8202IYZ-T7 (See Note) PART TAPE & MARKING REEL m m m BAPAA BAPAA 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" PACKAGE PKG. DWG. #
Ordering Information (Continued)
PART NUMBER EL8403IS EL8403IS-T7 EL8403IS-T13 EL8403ISZ (See Note) EL8403ISZ-T7 (See Note) PART TAPE & MARKING REEL 8403IS 8403IS 8403IS 8403ISZ 8403ISZ 7" 13" 7" 13" 7" 13" 7" 13" PACKAGE 14 Ld SO 14 Ld SO 14 Ld SO 14 Ld SO (Pb-free) 14 Ld SO (Pb-free) 14 Ld SO (Pb-free) PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027
10 Ld MSOP MDP0043 10 Ld MSOP MDP0043 10 Ld MSOP MDP0043 10 Ld MSOP MDP0043 (Pb-free) 10 Ld MSOP MDP0043 (Pb-free) 10 Ld MSOP MDP0043 (Pb-free) 8 Ld SO 8 Ld SO 8 Ld SO 8 Ld SO (Pb-free) 8 Ld SO (Pb-free) 8 Ld SO (Pb-free) 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0043 MDP0043 MDP0043
EL8202IYZ-T13 BAPAA (See Note) EL8203IS EL8203IS-T7 EL8203IS-T13 EL8203ISZ (See Note) EL8203ISZ-T7 (See Note) 8203IS 8203IS 8203IS 8203ISZ 8203ISZ
EL8403ISZ-T13 8403ISZ (See Note) EL8403IU EL8403IU-T7 EL8403IU-T13 EL8403IUZ (See Note) EL8403IUZ-T7 (See Note) 8403IU 8403IU 8403IU 8403IUZ 8403IUZ
16 Ld QSOP MDP0040 16 Ld QSOP MDP0040 16 Ld QSOP MDP0040 16 Ld QSOP MDP0040 (Pb-free) 16 Ld QSOP MDP0040 (Pb-free) 16 Ld QSOP MDP0040 (Pb-free)
EL8203ISZ-T13 8203ISZ (See Note) EL8203IY EL8203IY-T7 EL8203IY-T13 BJAAA BJAAA BJAAA
EL8403IUZ-T13 8403IUZ (See Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003, 2006. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL8202, EL8203, EL8403 Pinouts
EL8202 (10 LD MSOP) TOP VIEW
INA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 + + 10 INA9 OUTA 8 VS+ 7 OUTB 6 INB-
EL8203 (8 LD SO, MSOP) TOP VIEW
OUTA 1 INA- 2 INA+ 3 VS- 4 + + 8 VS+ 7 OUTB 6 INB5 INB+
EL8403 (14 LD SO) TOP VIEW
OUTA 1 INA- 2 INA+ 3 VS+ 4 INB+ 5 INB- 6 OUTB 7 -+ B +C A -+ D +14 OUTD 13 IND12 IND+ 11 VS10 INC+ 9 INC8 OUTC OUTA 1 INA- 2 INA+ 3 VS+ 4 INB+ 5 INB- 6 OUTB 7 NC 8
EL8403 (16 LD QSOP) TOP VIEW
16 OUTD -+ +15 IND14 IND+ 13 VS12 INC+ -+ +11 INC10 OUTC 9 NC
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EL8202, EL8203, EL8403
Absolute Maximum Ratings (TA = 25C)
Supply Voltage from VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . VS+ +0.3V to VS- -0.3V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB IOS TCIOS CMRR Offset Voltage
VS+ = 5V, VS- = GND, TA = 25C, VCM = 2.5V, RL to 2.5V, AV = 1, Unless Otherwise Specified CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
-8 Measured from TMIN to TMAX VIN = 0V VIN = 0V Measured from TMIN to TMAX VCM = -0.15V to +3.5V (EL8202,EL8203) VCM = -0.15V to +3.5V (EL8403) 70 60 VS- 0.15 Common Mode -9
-0.8 3 -6 0.1 2 95 85
+8
mV V/C A
Offset Voltage Temperature Coefficient Input Bias Current Input Offset Current Input Bias Current Temperature Coefficient Common Mode Rejection Ratio
0.6
A nA/C dB dB
CMIR RIN CIN AVOL
Common Mode Input Range Input Resistance Input Capacitance Open Loop Gain VOUT = +1.5V to +3.5V, RL = 1k to GND VOUT = +1.5V to +3.5V, RL = 150 to GND
VS+ 1.5 3.5 0.5
V M pF dB dB
75
90 80
OUTPUT CHARACTERISTICS ROUT VOP Output Resistance Positive Output Voltage Swing AV = +1 RL = 1k RL = 150 VON Negative Output Voltage Swing RL = 150 RL = 1k (EL8202,EL8203) RL = 1k (EL8403) IOUT ISC (source) ISC (sink) Linear Output Current Short Circuit Current Short Circuit Current RL = 10 RL = 10 60 120 4.85 4.6 30 4.9 4.7 100 25 50 65 80 150 150 50 100 m V V mV mV mV mA mA mA
POWER SUPPLY PSRR IS-ON IS-OFF Power Supply Rejection Ratio Supply Current - Enabled (per amplifier) Supply Current - Disabled (per amplifier) EL8202 only VS+ = 4.5V to 5.5V 70 95 5.6 40 6.2 90 dB mA A
ENABLE (EL8202 ONLY) tEN tDS VIH-ENB VIL-ENB Enable Time Disable Time ENABLE Pin Voltage for Power-up ENABLE Pin Voltage for Shut-down 200 25 0.8 2 ns ns V V
3
EL8202, EL8203, EL8403
Electrical Specifications
PARAMETER IIH-ENB IIL-ENB VS+ = 5V, VS- = GND, TA = 25C, VCM = 2.5V, RL to 2.5V, AV = 1, Unless Otherwise Specified (Continued) CONDITIONS MIN TYP 8.6 0.01 MAX UNIT A A
DESCRIPTION ENABLE Pin Input Current High ENABLE Pin Input for Current Low
AC PERFORMANCE BW -3dB Bandwidth AV = +1, RF = 0, CL = 2.5pF AV = -1, RF = 1k, CL = 2.5pF AV = +2, RF = 1k, CL = 2.5pF AV = +10, RF = 1k, CL = 2.5pF BW Peak GBWP PM SR tR tF OS tPD tS dG dP eN iN+ iNeS 0.1dB Bandwidth Peaking Gain Bandwidth Product Phase Margin Slew Rate Rise Time Fall Time Overshoot Propagation Delay 0.1% Settling Time Differential Gain Differential Phase Input Noise Voltage Positive Input Noise Current Negative Input Noise Current Channel Separation RL = 1k, CL = 2.5pF AV = 2, RL = 100, VOUT = 0.5V to 4.5V 2.5VSTEP, 20% - 80% 2.5VSTEP, 20% - 80% 200mV step 200mV step 200mV step AV = +2, RF = 1k, RL = 150 AV = +2, RF = 1k, RL = 150 f = 10kHz f = 10kHz f = 10kHz f = 100kHz 500 AV = +1, RF = 0, CL = 2.5pF AV = +1, RL = 1k, CL = 2.5pF 500 140 165 18 35 2 200 55 600 4 2 10 1 15 0.01 0.01 12 1.7 1.3 95 MHz MHz MHz MHz MHz dB MHz V/s ns ns % ns ns % nV/Hz pA/Hz pA/Hz dB
Pin Descriptions
EL8202 (MSOP-10) 1, 5 2, 4 3 6, 10 7, 9 8 4 2, 6 1, 7 8 11 2, 6, 9, 13 1, 7, 8, 14 4 13 2,6,11,15 1,7,10,16 4 EL8203 (SO-8, MSOP-8) 3, 5 EL8403 (SO-14) 3, 5, 10, 12 EL8403 (QSOP-16) 3,5,12,14 NAME IN+ CE VSINOUT VS+ FUNCTION Non-inverting input for each channel Enable and disable input for each channel Negative power supply Inverting input for each channel Amplifier output for each channel Positive power supply
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EL8202, EL8203, EL8403 Typical Performance Curves
5 4 3 2 GAIN (dB) 1 0 -1 -2 -3 -4 -5 1M 10M VOP-P=1V 5 NORMALIZED GAIN (dB) 3 RF=RG=1k 1 -1 -3 VS=5V AV=2 RL=1k CL=2.5pF 1M 10M FREQUENCY (Hz) 100M 1G RF=RG=500 RF=RG=2k
VS=5V AV=1 RL=1k CL=2.5pF
VOP-P=200mV
VOP-P=2V 100M 1G
-5 100K
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGE LEVELS
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE vs RF AND RG
5 4 NORMALIZED GAIN (dB) 3 2 1 0 -1 -2 -3 -4 -5 1M AV=5 AV=10 NORMALIZED GAIN (dB) VS=5V CL=2.5pF RL=1k AV=2
4 2 0
AV=1
VS=5V CL=2.5pF RL=1k RF=1k
AV=-1 AV=-5
-2 -4 -6 100K
AV=-10
10M
100M
1G
1M
10M FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS NON-INVERTING GAINS
FIGURE 4. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS INVERTING GAINS
5
11 RL=100 9 RL=1k GAIN (dB) 7 5 3
V =5V 4 AS=1 V 3 CL=2.5pF 2 GAIN (dB) 1 0 -1 -2 -3 -4 -5 1M 10M
VS=5V AV=2 CL=2.5pF RF=RG=1k RL=500 RL=1k, 150
RL=500 100M 1G
1 100K
1M
10M FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 5. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS NON-INVERTING GAINS
FIGURE 6. SMALL SIGNAL FREQUENCY RESPONSE vs VARIOUS RLOAD
5
EL8202, EL8203, EL8403 Typical Performance Curves (Continued)
5 4 3 3 GAIN (dB) 1 0 -1 -2 -3 -4
VS=5V AV=1 RL=1k
16 CL=5.4pF CL=2.5pF GAIN (dB) 14 12 10 8 6 4 2 0 -2 10M 100M 1G
VS=5V AV=2 RF=RG=1k
CL=28.5pF CL=20pF
CL=1.5pF
CL=10pF CL=2.5pF
-5 1M
-4 100K
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 7. SMALL SIGNAL FREQUENCY RESPONSE VS CL
FIGURE 8. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS CL
110 70 GAIN (dB) 30
RL=1k RL=150
405 315 GAIN (dB) 225 PHASE ()
-10 -30 -50 -70 -90 -110 1K
VS=5V AV=1 RL=1k
RL=150 -10 -50 -90 1K RL=1k 135 45 -45 1G
10K
100K
1M
10M
100M
10K
100K
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 10. DISABLED OUTPUT ISOLATION FREQUENCY RESPONSE
-10 -30 BANDWIDTH (MHz) PSRR (dB) -50 -70 -90 -110 1K PSRRPSRR+
600 550 500 450 400 350 300 250 200 150 100 10K 100K 1M 10M 100M 3
RL=1k CL=2.5pF AV=1
AV=2
3.5
4 VS (V)
4.5
5
5.5
FREQUENCY (Hz)
FIGURE 11. POWER SUPPLY REJECTION RATIO vs FREQUENCY
FIGURE 12. SMALL SIGNAL BANDWIDTH vs SUPPLY VOLTAGE
6
EL8202, EL8203, EL8403 Typical Performance Curves (Continued)
100
3.5 3 RL=1k CL=1.5pF AV=1
IMPEDANCE ()
10 PEAKING (dB)
2.5 2 1.5 1 0.5
1
0.1
AV=2
0.01 10K
0 100K 1M FREQUENCY (Hz) 10M 100M 3 3.5 4 VS (V) 4.5 5 5.5
FIGURE 13. OUPUT IMPEDANCE vs FREQUENCY
FIGURE 14. SMALL SIGNAL PEAKING vs SUPPLY VOLTAGE
-15 -35 CMRR (dB) -55 -75 -95 -115 100K
10 8 6 4 2 0 1M 10M 100M FREQUENCY (Hz)
IS (mA)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
VS (V)
FIGURE 15. COMMON-MODE REJECTION RATIO vs FREQUENCY
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE (PER CHANNEL)
-60
DISTORTION (dBc)
HD2@5MHz
DISTORTION (dBc)
-70
VS=5V RL=1k CL=2.5pF AV=2
-70
HD2@10MHz
-75 -80 -85 -90 -95 VS=5V f=5MHz VO=1VP-P for AV=1 VO=2VP-P for AV=2
HD2@
H D 2@
AV =2
-80
AV =1
Hz @1M Hz HD2 HD3@10M
M HD3@5 Hz
-90
HD3 @ HD3 @
AV =2
HD3@1MHz 3 VOP-P (V) 4 5
AV =1
-100
1
2
-100 100 RLOAD ()
1K
2K
FIGURE 17. HARMONIC DISTORTION vs OUTPUT VOLTAGE
FIGURE 18. HARMONIC DISTORTION vs LOAD RESISTANCE
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EL8202, EL8203, EL8403 Typical Performance Curves (Continued)
-50 -60 DISTORTION (dBc) -70 -80 -90 -100 VOLTAGE NOISE (nV/Hz) CURRENT NOISE (pA/Hz), VS=5V RL=1k CL=2.5pF VO=1VP-P for AV=1 VO=2VP-P for AV=2
=2 D2@AV
1K
100 eN
H
HD2@AV=1
10 IN+ IN-
HD3@AV=2
HD3
@
AV=1
1
10 FREQUENCY (MHz)
40
1 10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FIGURE 19. HARMONIC DISTORTION vs FREQUENCY
FIGURE 20. VOLTAGE AND CURRENT NOISE vs FREQUENCY
0 CHANNEL SEPARATION (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 100K 1M 10M FREQUENCY (Hz) 100M 1G CH1<=>CH2 CHANNEL SEPARATION (dB)
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 100K 1M 10M FREQUENCY (Hz) CH1<=>CH2 CH1<=>CH4 CH2<=>CH3 CH1<=>CH3 CH2<=>CH4 100M 1G
FIGURE 21. CHANNEL SEPARATION vs FREQUENCY (EL8202 AND EL8203)
FIGURE 22. CHANNEL SEPARATION vs FREQUENCY (EL8403)
3.5
VS=5V AV=1 RL=1k to 2.5V CL=5pF
3.5
VS=5V AV=1 RL=1k to 2.5V CL=5pF
2.5
2.5
1.5
1.5
2ns/DIV
2ns/DIV
FIGURE 23. LARGE SIGNAL TRANSIENT RESPONSE - RISING
FIGURE 24. LARGE SIGNAL TRANSIENT RESPONSE - FALLING
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EL8202, EL8203, EL8403 Typical Performance Curves (Continued)
2.6 2.5 2.4
VS=5V, AV=1, RL=1k TO 2.5V, CL= 2.5pF VIN 5
VS=5V, AV=5, RL=1k to 2.5V
2.5 2.6 2.5 2.4 10ns/DIV 2s/DIV VOUT 0
FIGURE 25. SMALL SIGNAL TRANSIENT REPONSE
FIGURE 26. OUTPUT SWING
VS=5V, AV=5, RL=1k TO 2.5V 5
CH1
ENABLE INPUT
2.5
CH2
0
VOUT
2s/DIV
CH1, CH2, 1V/DIV, M=100ns
FIGURE 27. OUTPUT SWING
FIGURE 28. ENABLED RESPONSES (EL8202)
POWER DISSIPATION (W)
1 0.9 833mW 0.8 0.7 625mW 0.6 633mW 0.5 0.4 486mW 0.3 0.2 0.1 0 0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
CH1
ENABLE INPUT
JA
SO =1 14 20 C /W
SO8 JA=160C/W QSOP16 JA=158C/W
CH2
VOUT
MSOP8/10 JA=206C/W
CH1, CH2, 0.5V/DIV, M=20ns
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (C)
FIGURE 29. DISABLED RESPONSE (EL8202)
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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EL8202, EL8203, EL8403 Typical Performance Curves (Continued)
1.4 POWER DISSIPATION (W)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.2 1.136W 1 909mW 0.8 0.6 0.4 0.2 0 0 25 50 893mW 870mW MSOP8/10 JA=115C/W
JA
SO =8 14 8 C/ W
SO8 JA=110C/W QSOP16 JA=112C/W 75 85 100 125 150
AMBIENT TEMPERATURE (C)
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Simplified Schematic Diagram
VS+ I1 I2 Q5 R3 R1 IN+ Q1 Q2 R2 INDIFFERENTIAL TO SINGLE ENDED DRIVE GENERATOR Q3 Q4 Q8 R4 R5 VSR9 OUT R6 R7 VBIAS1 R8 Q7
Q6
VBIAS2
Description of Operation and Application Information
Product Description
The EL8202, EL8203 and EL8403 are wide bandwidth, single supply, low power and rail-to-rail output voltage feedback operational amplifiers. The amplifiers are internally compensated for closed loop gain of +1 of greater. Connected in voltage follower mode and driving a 1k load, the EL8202, EL8203 and EL8403 have a -3dB bandwidth of 500MHz. Driving a 150 load, the bandwidth is about 350MHz while maintaining a 600V/us slew rate. The EL8202 is available with a power down pin to reduce power to 30A typically while the amplifier is disabled.
Input, Output and Supply Voltage Range
The EL8202, EL8203 and EL8403 have been designed to operate with a single supply voltage from 3V to 5.0V. Split supplies can also be used as long as their total voltage is within 3V to 5.0V. The amplifiers have an input common mode voltage range from 0.15V below the negative supply (VS- pin) to within 1.5V of the positive supply (VS+ pin). If the input signal is outside the above specified range, it will cause the output signal to be distorted. The output of the EL8202, EL8203 and EL8403 can swing rail to rail. As the load resistance becomes lower, the ability to drive close to each rail is reduced. For the load resistor 1k, the output swing is about 4.9V at a 5V supply. For the load resistor 150, the output swing is about 4.6V.
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EL8202, EL8203, EL8403
Choice of Feedback Resistor and Gain Bandwidth Product
For applications that require a gain of +1, no feedback resistor is required. Just short the output pin to the inverting input pin. For gains greater than +1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value that should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few pF range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. As far as the output stage of the amplifier is concerned, the output stage is also a gain stage with the load. RF and RG appear in parallel with RL for gains other than +1. As this combination gets smaller, the bandwidth falls off. Consequently, RF also has a minimum value that should not be exceeded for optimum performance. For gain of +1, RF=0 is optimum. For the gains other than +1, optimum response is obtained with RF between 300 to 1k. The EL8202, EL8203 and EL8403 have a gain bandwidth product of 200MHz. For gains 5, its bandwidth can be predicted by the following equation:
Gain x BW = 200MHz
allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking.
Disable/Power-Down
The EL8202 can be disabled and placed its output in a high impedance state. The turn off time is about 25ns and the turn on time is about 200ns. When disabled, the amplifier's supply current is reduced to 40A typically, thereby effectively eliminating the power consumption. The amplifier's power down can be controlled by standard TTL or CMOS signal levels at the ENABLE pin. The applied logic signal is relative to VS- pin. Letting the ENABLE pin float or applying a signal that is less than 0.8V above VS- will enable the amplifier. The amplifier will be disabled when the signal at ENABLE pin is 2V above VS-.
Output Drive Capability
The EL8202, EL8203 and EL8403 do not have internal short circuit protection circuitry. They have a typical short circuit current of 80mA sourcing and 150mA sinking for the output is connected to half way between the rails with a 10 resistor. If the output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds 40mA. This limit is set by the design of the internal metal interconnections.
Video Performance
For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This is especially difficult when driving a standard video load of 150, because the change in output current with DC level. Special circuitry has been incorporated in the EL8202, EL8203 and EL8403 to reduce the variation of the output impedance with the current output. This results in dG and dP specifications of 0.01% and 0.01, while driving 150 at a gain of 2. Driving high impedance loads would give a similar or better dG and dP performance.
Power Dissipation
With the high output drive capability of the EL8202, EL8203 and EL8403. It is possible to exceed the 125C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if the load conditions or package types need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to:
T JMAX - T AMAX PD MAX = ------------------------------------------- JA
Driving Capacitive Loads and Cables
The EL8202, EL8203 and EL8403 can drive 5pF loads in parallel with 1k with less than 5dB of peaking at gain of +1. If less peaking is desired in applications, a small series resistor (usually between 5 to 50) can be placed in series with the output to eliminate most peaking. However, this will reduce the gain slightly. If the gain setting is greater than 1, the gain resistor RG can then be chosen to make up for any gain loss which may be created by the additional series resistor at the output. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and 11
Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or:
EL8202, EL8203, EL8403
For sourcing:
V OUTi PD MAX = V S x I SMAX + ( V S - V OUTi ) x ---------------R Li
as well as the output signal with the negative going sync pulse removed.
5V VIN 75 + VS+ VS75 VOUT 75
For sinking:
PD MAX = V S x I SMAX + ( V OUTi - V S- ) x I LOADi
-
Where: VS = Total supply voltage ISMAX = Maximum quiescent supply current VOUTi = Maximum output voltage of the application for each channel RLOADi = Load resistance tied to ground for each channel ILOADi = Load current for each channel By setting the two PDMAX equations equal to each other, we can solve the output current and RLOADi to avoid the device overheat.
1K
1K
FIGURE 32. SYNC PULSE REMOVER
1V VIN 0.5V 0V 1V VOUT 0.5V 0V
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. For good AC performance, parasitic capacitance should be kept to a minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces.
M = 10s/DIV
FIGURE 33. VIDEO SIGNAL
MULTIPLEXER Besides the normal power down usage, the ENABLE pin of the EL8202 can be used for multiplexing applications. Figure 34 shows two EL8202 with the outputs tied together, driving a back terminated 75 video load. A 2VP-P 2MHz sine wave is applied to Amp A and a 1VP-P 2MHz sine wave is applied to Amp B. Figure 33 shows the ENABLE signal and the resulting output waveform at VOUT. Observe the breakbefore-make operation of the multiplexing. Amp A is on and VIN1 is passed through to the output when the ENABLE signal is low and turns off in about 25ns when the ENABLE signal is high. About 200ns later, Amp B turns on and VIN2 is passed through to the output. The break-before-make operation ensures that more than one amplifier isn't trying to drive the bus at the same time.
Typical Applications
VIDEO SYNC PULSE REMOVER Many CMOS analog to digital converters have a parasitic latch up problem when subjected to negative input voltage levels. Since the sync tip contains no useful video information and it is a negative going pulse, we can chop it off. Figure 32 shows a gain of 2 connections. Figure 33 shows the complete input video signal applied at the input,
12
EL8202, EL8203, EL8403
+2.5V B 2MHz 1VP-P + 5V
75
-2.5V 1K +2.5V 75 VOUT
VIN RT 75
C1 47F R2 10K
R1 10K +
R3 C3 470F 75
VOUT
-
1K
75 75 RG 1k RF 1k C2 220F
A 2MHz 2VP-P
+ 75
-
-2.5V 1K
1K ENABLE
FIGURE 36. 5V SINGLE SUPPLY NON INVERTING VIDEO LINE DRIVER
FIGURE 34. TWO TO ONE MULTIPLEXER
VIN C1 RG 47F 500 5V R1 10K R2 10K
RF 1k 5V R3 C3 470F 75
0V -0.5V ENABLE -1.5V -2.5V 1V 0V A B -1V
-
VOUT
RT 75
+ 75
C2 220F
FIGURE 37. SINGLE SUPPLY INVERTING VIDEO LINE DRIVER
M = 50ns/DIV
NORMALIZED GAIN (dB)
4 3 2 1 0 -1 -2 -3 -4 -5 -6 100K 1M 10M FREQUENCY (Hz) 100M 500M AV = -2 AV = 2
FIGURE 35.
SINGLE SUPPLY VIDEO LINE DRIVER The EL8202, EL8203 and EL8403 are wideband rail-to-rail output op amplifiers with large output current, excellent dG, dP, and low distortion that allow them to drive video signals in low supply applications. Figure 36 is the single supply non-inverting video line driver configuration and Figure 37 is the inverting video ling driver configuration. The signal is AC coupled by C1. R1 and R2 are used to level shift the input and output to provide the largest output swing. RF and RG set the AC gain. C2 isolates the virtual ground potential. RT and R3 are the termination resistors for the line. C1, C2 and C3 are selected big enough to minimize the droop of the luminance signal.
FIGURE 38. VIDEO LINE DRIVER FREQUENCY RESPONSE
13
EL8202, EL8203, EL8403 SO Package Outline Drawing
14
EL8202, EL8203, EL8403 MSOP Package Outline Drawing
15
EL8202, EL8203, EL8403 QSOP Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 16

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